303 research outputs found

    The formal verification of generic interpreters

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    The task assignment 3 of the design and validation of digital flight control systems suitable for fly-by-wire applications is studied. Task 3 is associated with formal verification of embedded systems. In particular, results are presented that provide a methodological approach to microprocessor verification. A hierarchical decomposition strategy for specifying microprocessors is also presented. A theory of generic interpreters is presented that can be used to model microprocessor behavior. The generic interpreter theory abstracts away the details of instruction functionality, leaving a general model of what an interpreter does

    Formal proof of the AVM-1 microprocessor using the concept of generic interpreters

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    A microprocessor designated AVM-1 was designed to demonstrate the use of generic interpreters in verifying hierarchically decomposed microprocessor specifications. This report is intended to document the high-order language (HOL) code verifying AVM-1. The organization of the proof is discussed and some technical details concerning the execution of the proof scripts in HOL are presented. The proof scripts used to verify AVM-1 are also presented

    Formal specification of a high speed CMOS correlator

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    The formal specification of a high speed CMOS correlator is presented. The specification gives the high-level behavior of the correlator and provides a clear, unambiguous description of the high-level architecture of the device

    Verification of VLSI designs

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    In this paper we explore the specification and verification of VLSI designs. The paper focuses on abstract specification and verification of functionality using mathematical logic as opposed to low-level boolean equivalence verification such as that done using BDD's and Model Checking. Specification and verification, sometimes called formal methods, is one tool for increasing computer dependability in the face of an exponentially increasing testing effort

    A verification logic representation of indeterministic signal states

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    The integration of modern CAD tools with formal verification environments require translation from hardware description language to verification logic. A signal representation including both unknown state and a degree of strength indeterminacy is essential for the correct modeling of many VLSI circuit designs. A higher-order logic theory of indeterministic logic signals is presented

    HDL to verification logic translator

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    The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models

    A nonlinear and time-dependent leak current in the presence of calcium fluoride patch-clamp seal enhancer [version 1; peer review: 2 approved with reservations]

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    Automated patch-clamp platforms are widely used and vital tools in both academia and industry to enable high-throughput studies such as drug screening. A leak current to ground occurs whenever the seal between a pipette and cell (or internal solution and cell in high-throughput machines) is not perfectly insulated from the bath (extracellular) solution. Over 1 GΩ seal resistance between pipette and bath solutions is commonly used as a quality standard for manual patch work. With automated platforms it can be difficult to obtain such a high seal resistance between the intra- and extra-cellular solutions. One suggested method to alleviate this problem is using an F− containing internal solution together with a Ca2+ containing external solution — so that a CaF2 crystal forms when the two solutions meet which ‘plugs the holes’ to enhance the seal resistance. However, we observed an unexpected nonlinear-in-voltage and time-dependent current using these solutions on an automated patch-clamp platform. We performed manual patch-clamp experiments with the automated patch-clamp solutions, but no biological cell, and observed the same nonlinear time-dependent leak current. The current could be completely removed by washing out F− ions to leave a conventional leak current that was linear and not time-dependent. We therefore conclude fluoride ions interacting with the CaF2 crystal are the origin of the nonlinear time-dependent leak current. The consequences of such a nonlinear and time-dependent leak current polluting measurements should be considered carefully if it cannot be isolated and subtracted

    Correctness proof of an in-place permutation

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    ‘I’m good, but not that good’: digitally-skilled young people’s identity in computing

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    Computers and information technology are fast becoming a part of young people’s everyday life. However, there remains a difference between the majority who can use computers and the minority who are computer scientists or professionals. Drawing on 32 semi-structured interviews with digitally-skilled young people (aged 13-19), we explore their views and aspirations in computing, with a focus on the identities and discourses that these youngsters articulate in relation to this field. Our findings suggest that, even among digitally-skilled young people, traditional identities of computing as people who are clever but antisocial still prevail, which can be unattractive for youths, especially girls. Digitally-skilled youths identify with computing in different ways and for different reasons. Most enjoy doing computing but few aspired to being a computer person. Implications of our findings for computing education are discussed, especially the continued need to broaden identities in computing, even for the digitally-skilled
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